# 6502

The 6502 is an 8-bit microprocessor for MOS Technology in 1975. The instruction set of the 6502 microprocessor is considered by many to be very simple compared to other microprocessors, requiring only 151 opcodes to handle 53 different instructions of different modes.

Many computers and video game consoles of the 1980s used a 6502 microprocessor or a close variation of the 6502 microproccesor, including the Apple II, Atari 2600, Commodore 64, BBC Micro, and the Nintendo Entertainment system.

## 6502 Pinout

                  +---v---+
     (GND) VSS -- |1    40| <- /RST
           RDY -> |2    39| -> CLC2 (OUT)
    (OUT) CLC1 <- |3    38| -- SO (Set Overflow)
          /IRQ -> |4    37| -- CLC0 (IN)
          N.C. -- |5    36| -> R/W (Read /Write)
          /NMI -> |6    35| -- N.C.
          SYNC <- |7    34| -- N.C.
     (+5V) VCC -- |8    33| <> D0
            A0 <- |9    32| <> D1
            A1 <- |10   31| <> D2
            A2 <- |11   30| <> D3
            A3 <- |12   29| <> D4
            A4 <- |13   28| <> D5
            A5 <- |14   27| <> D6
            A6 <- |15   26| <> D7
            A7 <- |16   25| -> A15
            A8 <- |17   24| -> A14
            A9 <- |18   23| -> A13
           A10 <- |19   22| -> A12
           A11 <- |20   21| -- VSS (GND)
                  +-------+

## 6502 Instructions

- ADC
- AND
- ASL
- BCC
- BCS
- BEQ
- BIT
- BMI
- BNE
- BPL
- BRK
- BVC
- BVS
- CLC
- CLD
- CLI
- CLV
- CMP
- CPX
- CPY
- DEC
- DEX
- DEY
- EOR
- INC
- INX
- INY
- JMP
- JSR
- LDA
- LDX
- LDY
- LSR
- NOP
- ORA
- PHA
- PHP
- PLA
- PLP
- ROL
- ROR
- RTI
- RTS
- SBC
- SEC
- SED
- SEI
- STA
- STX
- STY
- TAX
- TAY
- TSX
- TXA
- TXS
- TYA

### 6502 Processor Status Flags

- C (bit 0) - Carry Flag
- Z (bit 1) - Zero Flag
- I (bit 2) - Interrupt Disable
- D (bit 3) - Decimal Mode Flag
- B (bit 4) - Break Command
- - (bit 5) - Always 1
- V (bit 6) - Overflow Flag
- N (bit 7) - Negative Flag

### 6502 Opcode Modes

- Implied - No arguments are needed
- Accumulator - Operates directly on Accumulator (A)
- Immediate - Argument is literal value rather than an address
- Relative - Argument is a signed 8-bit integer
- Zero Page - Argument is an 8-bit memory address in memory address range $0000-$00FF
- Zero Page,X - Argument is an 8-bit memory address in range $0000-$00FF and the value of X is added to it
- Absolute - Argument is a full 16-bit memory address
- Absolute,X - Argument is a full 16-bit memory address and the value of X is added to it
- Absolute,Y - Argument is a full 16-bit memory address and the value of Y is added to it
- (Indirect) - Argument is a full 16-bit memory address. The value of at the memory address is the low byte of the real target of the instruction. The value of the byte after the memory address is the high byte of the real tartet of the instruction.
- (Indirect,X) - Argument is a full 16-bit memory address. X is added to that memory address and the value at the X modified memory address is the low byte of the real target of the instruction. The value at the byte after the X modified memory address is the high byte of the real tartet of the instruction.
- (Indirect),Y - Argument is a full 16-bit memory address. Y is added to that memory address and the value at the Y modified memory address is the low byte of the real target of the instruction. The value at the byte after the Y modified memory address is the high byte of the real tartet of the instruction.

### ADC - Add with Carry

Adds target memory value and Carry Flag (C) (1 if Carry flag is set [1] or 0 if Carry Flag is clear [0]) to A and stores the result into A

Processor Status After Use:

- C: 1 if A overflowed
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: 1 if A overflowed, otherwise 0
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Immediate

- Syntax: ADC #$12
- Opcode: $69
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: ADC $12
- Opcode: $65
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: ADC $12,X
- Opcode: $75
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: ADC $1234
- Opcode: $6D
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: ADC $1234,X
- Opcode: $7D
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: Absolute,Y

- Syntax: ADC $1234,Y
- Opcode: $79
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: (Indirect,X)

- Syntax: ADC ($12,X)
- Opcode: $61
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: ADC ($12),Y
- Opcode: $71
- Bytes: 2
- Cycles: 5 (+1 if page crossed)

### AND - Logical AND

Logical AND operation "A AND target memory" is performed and the result is stored into A

Processor Status After Use:

- C: -
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Immediate

- Syntax: AND #$12
- Opcode: $29
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: AND $12
- Opcode: $25
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: AND $12,X
- Opcode: $35
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: AND $1234
- Opcode: $2D
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: AND $1234,X
- Opcode: $3D
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: Absolute,Y

- Syntax: AND $1234,Y
- Opcode: $39
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: (Indirect,X)

- Syntax: AND ($12,X)
- Opcode: $21
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: AND ($12),Y
- Opcode: $31
- Bytes: 2
- Cycles: 5 (+1 if page crossed)

### ASL - Arithmetic Shift Left

Shifts all bits of target to the left by 1. 0 is shifted into bit 0 of the target and bit 7 of the target is shifted into Carry Flag (C).

Processor Status After Use:

- C: 1 if old bit 7 of target = 1, otherwise 0
- Z: 1 if target = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of target = 1, otherwise 0

Mode: Accumulator

- Syntax: ASL
- Opcode: $0A
- Bytes: 1
- Cycles: 2

Mode: Zero Page

- Syntax: ASL $12
- Opcode: $06
- Bytes: 2
- Cycles: 5

Mode: Zero Page,X

- Syntax: ASL $12,X
- Opcode: $16
- Bytes: 2
- Cycles: 6

Mode: Absolute

- Syntax: ASL $1234
- Opcode: $0E
- Bytes: 3
- Cycles: 6

Mode: Absolute,X

- Syntax: ASL $1234,X
- Opcode: $1E
- Bytes: 3
- Cycles: 7

### BCC - Branch if Carry Clear

If Carry Flag (C) is clear (0), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BCC $12
- Opcode: $90
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### BCS - Branch if Carry Set

If Carry Flag (C) is set (1), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BCS $12
- Opcode: $B0
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### BEQ - Branch if Equal

If Zero Flag (Z) is set (1), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BEQ $12
- Opcode: $F0
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### BIT - Bit Test

Logical AND operation "A AND target memory" is performed

Processor Status After Use:

- C: -
- Z: 1 if result of AND = 0, otherwise 0
- I: -
- D: -
- B: -
- V: 1 if bit 6 of result of AND = 1, otherwise 0
- N: 1 if bit 7 of result of AND = 1, otherwise 0

Mode: Zero Page

- Syntax: BIT $12
- Opcode: $24
- Bytes: 2
- Cycles: 3

Mode: Absolute

- Syntax: BIT $1234
- Opcode: $2C
- Bytes: 3
- Cycles: 4

### BMI - Branch if Minus

If Negative Flag (N) is set (1), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BMI $12
- Opcode: $30
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### BNE - Branch if Not Equal

If Zero Flag (Z) is clear (0), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BNE $12
- Opcode: $D0
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### BPL - Branch if Positive

If Negative Flag (N) is clear (0), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BPL $12
- Opcode: $10
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### BRK - Force Interrupt

The Program Counter is pushed onto the stack and then Processor Status is pushed onto the stack. Stack Pointer is incremented by 3. Value at IRQ Interrupt Vector ($FFFE-$FFFF) is loaded into Program Counter and Break Command (B) is set (set to 1).

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: 1
- V: -
- N: -

Mode: Implied

- Syntax: BRK
- Opcode: $00
- Bytes: 1
- Cycles: 7

### BVC - Branch if Overflow Clear

If Overflow Flag (V) is clear (0), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BVC $12
- Opcode: $50
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### BVS - Branch if Overflow Set

If Overflow Flag (V) is set (0), add the unsigned argument value to Program Counter

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Relative

- Syntax: BVS $12
- Opcode: $70
- Bytes: 2
- Cycles: 2 (+1 if branch succeeds +2 if to a new page)

### CLC - Clear Carry Flag (C)

Clears Carry Flag (C) (sets to 0)

Processor Status After Use:

- C: 0
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: CLC
- Opcode: $18
- Bytes: 1
- Cycles: 2

### CLD - Clear Decimal Mode Flag (D)

Clears Decimal Mode Flag (D) (sets to 0). Decimal Mode Flag (D) value is uncertain at power-on.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: 0
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: CLD
- Opcode: $D8
- Bytes: 1
- Cycles: 2

### CLI - Clear Interrupt Disable

Clears Interrupt Disable (I) (sets to 0)

Processor Status After Use:

- C: -
- Z: -
- I: 0
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: CLI
- Opcode: $58
- Bytes: 1
- Cycles: 2

### CLV - Clear Overflow Flag (V)

Clears Overflow Flag (V) (sets to 0)

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: 0
- N: -

Mode: Implied

- Syntax: CLV
- Opcode: $B8
- Bytes: 1
- Cycles: 2

### CMP - Compare

Compares A to target memory value

Processor Status After Use:

- C: 1 if A >= target memory value, otherwise 0
- Z: 1 if A = target memory value, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of result = 1, otherwise 0

Mode: Immediate

- Syntax: CMP #$12
- Opcode: $C9
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: CMP $12
- Opcode: $C5
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: CMP $12,X
- Opcode: $D5
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: CMP $1234
- Opcode: $CD
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: CMP $1234,X
- Opcode: $DD
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: Absolute,Y

- Syntax: CMP $1234,Y
- Opcode: $D9
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: (Indirect,X)

- Syntax: CMP ($12,X)
- Opcode: $C1
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: CMP ($12),Y
- Opcode: $D1
- Bytes: 2
- Cycles: 5 (+1 if page crossed)

### CPX - Compare

Compares X to target memory value

Processor Status After Use:

- C: 1 if X >= target memory value, otherwise 0
- Z: 1 if X = target memory value, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of result = 1, otherwise 0

Mode: Immediate

- Syntax: CPX #$12
- Opcode: $E0
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: CPX $12
- Opcode: $E4
- Bytes: 2
- Cycles: 3

Mode: Absolute

- Syntax: CPX $1234
- Opcode: $EC
- Bytes: 3
- Cycles: 4

### CPY - Compare

Compares Y to target memory value

Processor Status After Use:

- C: 1 if Y >= target memory value, otherwise 0
- Z: 1 if Y = target memory value, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of result = 1, otherwise 0

Mode: Immediate

- Syntax: CPY #$12
- Opcode: $C0
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: CPY $12
- Opcode: $C4
- Bytes: 2
- Cycles: 3

Mode: Absolute

- Syntax: CPY $1234
- Opcode: $CC
- Bytes: 3
- Cycles: 4

### DEC - Decrement Memory

Subtracts 1 from target memory value and stores the result into target memory

Processor Status After Use:

- C: -
- Z: 1 if result = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of result = 1, otherwise 0

Mode: Zero Page

- Syntax: DEC $12
- Opcode: $C6
- Bytes: 2
- Cycles: 5

Mode: Zero Page,X

- Syntax: DEC $12,X
- Opcode: $D6
- Bytes: 2
- Cycles: 6

Mode: Absolute

- Syntax: DEC $1234
- Opcode: $CE
- Bytes: 3
- Cycles: 6

Mode: Absolute,X

- Syntax: DEC $1234,X
- Opcode: $DE
- Bytes: 3
- Cycles: 7

### DEX - Decrement X Register

Subtracts 1 from X and stores the result into X

Processor Status After Use:

- C: -
- Z: 1 if X = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of X = 1, otherwise 0

Mode: Implied

- Syntax: DEX
- Opcode: $CA
- Bytes: 1
- Cycles: 2

### DEY - Decrement Y Register

Subtracts 1 from Y and stores the result into X

Processor Status After Use:

- C: -
- Z: 1 if Y = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of Y = 1, otherwise 0

Mode: Implied

- Syntax: DEY
- Opcode: $88
- Bytes: 1
- Cycles: 2

### EOR - Exclusive OR

Logical XOR operation "A XOR target memory" is performed and the result is stored into A

Processor Status After Use:

- C: -
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Immediate

- Syntax: EOR #$12
- Opcode: $49
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: EOR $12
- Opcode: $45
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: EOR $12,X
- Opcode: $55
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: EOR $1234
- Opcode: $4D
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: EOR $1234,X
- Opcode: $5D
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: Absolute,Y

- Syntax: EOR $1234,Y
- Opcode: $59
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: (Indirect,X)

- Syntax: EOR ($12,X)
- Opcode: $41
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: EOR ($12),Y
- Opcode: $51
- Bytes: 2
- Cycles: 5 (+1 if page crossed)

### INC - Increment Memory

Adds 1 to target memory value and stores the result into target memory

Processor Status After Use:

- C: -
- Z: 1 if result = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of result = 1, otherwise 0

Mode: Zero Page

- Syntax: INC $12
- Opcode: $E6
- Bytes: 2
- Cycles: 5

Mode: Zero Page,X

- Syntax: INC $12,X
- Opcode: $F6
- Bytes: 2
- Cycles: 6

Mode: Absolute

- Syntax: INC $1234
- Opcode: $EE
- Bytes: 3
- Cycles: 6

Mode: Absolute,X

- Syntax: INC $1234,X
- Opcode: $FE
- Bytes: 3
- Cycles: 7

### INX - Increment X Register

Adds 1 to X and stores the result into X

Processor Status After Use:

- C: -
- Z: 1 if X = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of X = 1, otherwise 0

Mode: Implied

- Syntax: INX
- Opcode: $E8
- Bytes: 1
- Cycles: 2

### INY - Increment Y Register

Adds 1 to Y and stores the result into Y

Processor Status After Use:

- C: -
- Z: 1 if Y = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of Y = 1, otherwise 0

Mode: Implied

- Syntax: INY
- Opcode: $C8
- Bytes: 1
- Cycles: 2

### JMP - Jump

Sets Program Counter to address specified by argument. Original 6502 processors mishandle (Indirect) JMP instructions if the low byte of the argument is $FF and will not correctly increment the high byte of the argument by 1. For example, JMP ($10FF) sets the low byte of Program Counter to the value at memory address $10FF, but sets the high byte of Program Counter to the value at memory address $1000 instead of $1100.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Absolute

- Syntax: JMP $1234
- Opcode: $4C
- Bytes: 3
- Cycles: 3

Mode: (Indirect)

- Syntax: JMP ($1234)
- Opcode: $6C
- Bytes: 3
- Cycles: 5

### JSR - Jump to Subroutine

Pushes the Program Counter minus 1 onto the stack. Program Counter is then set to the argument value. Stack Pointer is incremented by 2.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Absolute

- Syntax: JSR $1234
- Opcode: $20
- Bytes: 3
- Cycles: 6

### LDA - Load Accumulator

Loads value of target memory into A

Processor Status After Use:

- C: -
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Immediate

- Syntax: LDA #$12
- Opcode: $A9
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: LDA $12
- Opcode: $A5
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: LDA $12,X
- Opcode: $B5
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: LDA $1234
- Opcode: $AD
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: LDA $1234,X
- Opcode: $BD
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: Absolute,Y

- Syntax: LDA $1234,Y
- Opcode: $B9
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: (Indirect,X)

- Syntax: LDA ($12,X)
- Opcode: $A1
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: LDA ($12),Y
- Opcode: $B1
- Bytes: 2
- Cycles: 5 (+1 if page crossed)

### LDX - Load X Register

Loads value of target memory into X

Processor Status After Use:

- C: -
- Z: 1 if X = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of X = 1, otherwise 0

Mode: Immediate

- Syntax: LDX #$12
- Opcode: $A2
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: LDX $12
- Opcode: $A6
- Bytes: 2
- Cycles: 3

Mode: Zero Page,Y

- Syntax: LDX $12,Y
- Opcode: $B6
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: LDX $1234
- Opcode: $AE
- Bytes: 3
- Cycles: 4

Mode: Absolute,Y

- Syntax: LDX $1234,Y
- Opcode: $BE
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

### LDY - Load Y Register

Loads value of target memory into Y

Processor Status After Use:

- C: -
- Z: 1 if Y = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of Y = 1, otherwise 0

Mode: Immediate

- Syntax: LDY #$12
- Opcode: $A0
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: LDY $12
- Opcode: $A4
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: LDY $12,X
- Opcode: $B4
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: LDY $1234
- Opcode: $AC
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: LDY $1234,X
- Opcode: $BC
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

### LSR - Logical Shift Right

Shifts all bits of target to the right by 1. 0 is shifted into bit 7 of the target and bit 0 of the target is shifted into Carry Flag (C).

Processor Status After Use:

- C: 1 if old bit 0 of target = 1, otherwise 0
- Z: 1 if target = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of target = 1, otherwise 0

Mode: Accumulator

- Syntax: LSR
- Opcode: $4A
- Bytes: 1
- Cycles: 2

Mode: Zero Page

- Syntax: LSR $12
- Opcode: $46
- Bytes: 2
- Cycles: 5

Mode: Zero Page,X

- Syntax: LSR $12,X
- Opcode: $56
- Bytes: 2
- Cycles: 6

Mode: Absolute

- Syntax: LSR $1234
- Opcode: $4E
- Bytes: 3
- Cycles: 6

Mode: Absolute,X

- Syntax: LSR $1234,X
- Opcode: $5E
- Bytes: 3
- Cycles: 7

### NOP - No Operation

No changes happen to the processor besides the normal incrementing of Program Counter to the next instruction.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: NOP
- Opcode: $EA
- Bytes: 1
- Cycles: 2

### ORA - Logical Inclusive OR

Logical OR operation "A OR target memory" is performed and the result is stored into A

Processor Status After Use:

- C: -
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Immediate

- Syntax: ORA #$12
- Opcode: $09
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: ORA $12
- Opcode: $05
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: ORA $12,X
- Opcode: $15
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: ORA $1234
- Opcode: $0D
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: ORA $1234,X
- Opcode: $1D
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: Absolute,Y

- Syntax: ORA $1234,Y
- Opcode: $19
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: (Indirect,X)

- Syntax: ORA ($12,X)
- Opcode: $01
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: ORA ($12),Y
- Opcode: $11
- Bytes: 2
- Cycles: 5 (+1 if page crossed)

### PHA - Push Accumulator

Pushes copy of the A onto the stack. Stack Pointer is incremented by 1.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: PHA
- Opcode: $48
- Bytes: 1
- Cycles: 3

### PHP - Push Processor Status

Pushes copy of Processor Status onto stack. Stack Pointer is incremented by 1.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: PHP
- Opcode: $08
- Bytes: 1
- Cycles: 3

### PLA - Pull Accumulator

Pops 1 byte from the stack and stores it into A. Stack pointer is decremented by 1.

Processor Status After Use:

- C: -
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Implied

- Syntax: PHP
- Opcode: $68
- Bytes: 1
- Cycles: 4

### PLP - Pull Processor Status

Pops 1 byte from the stack and Processor Status is set to that 1 byte. Stack pointer is decremented by 1.

Processor Status After Use:

- C: Set from stack
- Z: Set from stack
- I: Set from stack
- D: Set from stack
- B: Set from stack
- V: Set from stack
- N: Set from stack

Mode: Implied

- Syntax: PLP
- Opcode: $28
- Bytes: 1
- Cycles: 4

### ROL - Rotate Left

Shifts all bits of target to the left by 1. Carry Flag (C) value is shifted into bit 0 of the target and bit 7 of the target is shifted into Carry Flag (C).

Processor Status After Use:

- C: 1 if old bit 7 of target = 1, otherwise 0
- Z: 1 if target = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of target = 1, otherwise 0

Mode: Accumulator

- Syntax: ROL
- Opcode: $2A
- Bytes: 1
- Cycles: 2

Mode: Zero Page

- Syntax: ROL $12
- Opcode: $26
- Bytes: 2
- Cycles: 5

Mode: Zero Page,X

- Syntax: ROL $12,X
- Opcode: $36
- Bytes: 2
- Cycles: 6

Mode: Absolute

- Syntax: ROL $1234
- Opcode: $2E
- Bytes: 3
- Cycles: 6

Mode: Absolute,X

- Syntax: ROL $1234,X
- Opcode: $3E
- Bytes: 3
- Cycles: 7

### ROR - Rotate Right

Shifts all bits of target to the right by 1. Carry Flag (C) value is shifted into bit 7 of the target and bit 0 of the target is shifted into Carry Flag (C).

Processor Status After Use:

- C: 1 if old bit 0 of target = 1, otherwise 0
- Z: 1 if target = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of target = 1, otherwise 0

Mode: Accumulator

- Syntax: ROR
- Opcode: $6A
- Bytes: 1
- Cycles: 2

Mode: Zero Page

- Syntax: ROR $12
- Opcode: $66
- Bytes: 2
- Cycles: 5

Mode: Zero Page,X

- Syntax: ROR $12,X
- Opcode: $76
- Bytes: 2
- Cycles: 6

Mode: Absolute

- Syntax: ROR $1234
- Opcode: $6E
- Bytes: 3
- Cycles: 6

Mode: Absolute,X

- Syntax: ROR $1234,X
- Opcode: $7E
- Bytes: 3
- Cycles: 7

### RTI - Return from Interrupt

Pops 1 byte from the stack and sets Processor Status to that byte, then pops 2 more bytes from the stack and sets Program Counter to those 2 bytes. Stack pointer is decremented by 3.

Processor Status After Use:

- C: Set from stack
- Z: Set from stack
- I: Set from stack
- D: Set from stack
- B: Set from stack
- V: Set from stack
- N: Set from stack

Mode: Implied

- Syntax: RTI
- Opcode: $40
- Bytes: 1
- Cycles: 6

### RTS - Return from Subroutine

Pops 2 bytes from the stack and sets Program Counter to those 2 bytes. Program Counter is then incremented by 1. Stack Pointer is decremented by 2.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: RTS
- Opcode: $60
- Bytes: 1
- Cycles: 6

### SBC - Subtract with Carry

Subtracts target memory value and the NOT of Carry Flag (C) (1 if Carry flag is clear [0] or 0 if Carry Flag is set [1]) from A and stores the result into A

Processor Status After Use:

- C: 0 if A underflowed
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: 1 if A underflowed, otherwise 0
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Immediate

- Syntax: SBC #$12
- Opcode: $E9
- Bytes: 2
- Cycles: 2

Mode: Zero Page

- Syntax: SBC $12
- Opcode: $E5
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: SBC $12,X
- Opcode: $F5
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: SBC $1234
- Opcode: $ED
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: SBC $1234,X
- Opcode: $FD
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: Absolute,Y

- Syntax: SBC $1234,Y
- Opcode: $F9
- Bytes: 3
- Cycles: 4 (+1 if page crossed)

Mode: (Indirect,X)

- Syntax: SBC ($12,X)
- Opcode: $E1
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: SBC ($12),Y
- Opcode: $F1
- Bytes: 2
- Cycles: 5 (+1 if page crossed)

### SEC - Set Carry Flag (C)

Sets Carry Flag (C) (sets to 1)

Processor Status After Use:

- C: 1
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: SEC
- Opcode: $38
- Bytes: 1
- Cycles: 2

### SED - Set Decimal Mode Flag (D)

Sets Decimal Mode Flag (D) (sets to 1). Decimal Mode Flag (D) value is uncertain at power-on.

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: 1
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: SED
- Opcode: $F8
- Bytes: 1
- Cycles: 2

### SEI - Set Interrupt Disable

Sets Interrupt Disable (I) (sets to 1)

Processor Status After Use:

- C: -
- Z: -
- I: 1
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: SEI
- Opcode: $78
- Bytes: 1
- Cycles: 2

### STA - Store Accumulator

Stores value of A into target memory

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Zero Page

- Syntax: STA $12
- Opcode: $85
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: STA $12,X
- Opcode: $95
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: STA $1234
- Opcode: $8D
- Bytes: 3
- Cycles: 4

Mode: Absolute,X

- Syntax: STA $1234,X
- Opcode: $9D
- Bytes: 3
- Cycles: 5

Mode: Absolute,Y

- Syntax: STA $1234,Y
- Opcode: $99
- Bytes: 3
- Cycles: 5

Mode: (Indirect,X)

- Syntax: STA ($12,X)
- Opcode: $81
- Bytes: 2
- Cycles: 6

Mode: (Indirect),Y

- Syntax: STA ($12),Y
- Opcode: $91
- Bytes: 2
- Cycles: 6

### STX - Store X Register

Stores value of X into target memory

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Zero Page

- Syntax: STX $12
- Opcode: $86
- Bytes: 2
- Cycles: 3

Mode: Zero Page,Y

- Syntax: STA $12,Y
- Opcode: $96
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: STA $1234
- Opcode: $8E
- Bytes: 3
- Cycles: 4

### STY - Store Y Register

Stores content of Y into target memory

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Zero Page

- Syntax: STX $12
- Opcode: $84
- Bytes: 2
- Cycles: 3

Mode: Zero Page,X

- Syntax: STA $12,X
- Opcode: $94
- Bytes: 2
- Cycles: 4

Mode: Absolute

- Syntax: STA $1234
- Opcode: $8C
- Bytes: 3
- Cycles: 4

### TAX - Transfer Accumulator to X

Copies value of A and stores it into X

Processor Status After Use:

- C: -
- Z: 1 if X = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of X = 1, otherwise 0

Mode: Implied

- Syntax: TAX $12
- Opcode: $AA
- Bytes: 1
- Cycles: 2

### TAY - Transfer Accumulator to Y

Copies value of A and stores it into Y

Processor Status After Use:

- C: -
- Z: 1 if Y = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of Y = 1, otherwise 0

Mode: Implied

- Syntax: TAY $12
- Opcode: $A8
- Bytes: 1
- Cycles: 2

### TSX - Transfer Stack Pointer to X

Copies value of Stack Pointer and stores it into X

Processor Status After Use:

- C: -
- Z: 1 if X = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of X = 1, otherwise 0

Mode: Implied

- Syntax: TSX $12
- Opcode: $BA
- Bytes: 1
- Cycles: 2

### TXA - Transfer X to Accumulator

Copies value of X and stores it into A

Processor Status After Use:

- C: -
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Implied

- Syntax: TXA $12
- Opcode: $8A
- Bytes: 1
- Cycles: 2

### TXS - Transfer X to Stack Pointer

Copies value of X and stores it into Stack Pointer

Processor Status After Use:

- C: -
- Z: -
- I: -
- D: -
- B: -
- V: -
- N: -

Mode: Implied

- Syntax: TXS $12
- Opcode: $9A
- Bytes: 1
- Cycles: 2

### TYA - Transfer Y to Accumulator

Copies value of Y and stores it into A

Processor Status After Use:

- C: -
- Z: 1 if A = 0, otherwise 0
- I: -
- D: -
- B: -
- V: -
- N: 1 if bit 7 of A = 1, otherwise 0

Mode: Implied

- Syntax: TYA $12
- Opcode: $98
- Bytes: 1
- Cycles: 2

### 6502 Opcodes Table

           0   1   2   3   4   5   6   7   8   9   A   B   C   D   E   F
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x0_ |BRK|ORA|   |   |   |ORA|ASL|   |PHP|ORA|ASL|   |   |ORA|ASL|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x1_ |BPL|ORA|   |   |   |ORA|ASL|   |CLC|ORA|   |   |   |ORA|ASL|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x2_ |JSR|AND|   |   |BIT|AND|ROL|   |PLP|AND|ROL|   |BIT|AND|ROL|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x3_ |BMI|AND|   |   |   |AND|ROL|   |SEC|AND|   |   |   |AND|ROL|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x4_ |RTI|EOR|   |   |   |EOR|LSR|   |PHA|EOR|LSR|   |JMP|EOR|LSR|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x5_ |BVC|EOR|   |   |   |EOR|LSR|   |CLI|EOR|   |   |   |EOR|LSR|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x6_ |RTS|ADC|   |   |   |ADC|ROR|   |PLA|ADC|ROR|   |JMP|ADC|ROR|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x7_ |BVS|ADC|   |   |   |ADC|ROR|   |SEI|ADC|   |   |   |ADC|ROR|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x8_ |   |STA|   |   |STY|STA|STX|   |DEY|   |TXA|   |STY|STA|STX|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0x9_ |BCC|STA|   |   |STY|STA|STX|   |TYA|STA|TXS|   |   |STA|   |   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0xA_ |LDY|LDA|LDX|   |LDY|LDA|LDX|   |TAY|LDA|TAX|   |LDY|LDA|LDX|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0xB_ |BCS|LDA|   |   |LDY|LDA|LDX|   |CLV|LDA|TSX|   |LDY|LDA|LDX|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0xC_ |CPY|CMP|   |   |CPY|CMP|DEC|   |INY|CMP|DEX|   |CPY|CMP|DEC|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0xD_ |BNE|CMP|   |   |   |CMP|DEC|   |CLD|CMP|   |   |   |CMP|DEC|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0xE_ |CPX|SBC|   |   |CPX|SBC|INC|   |INX|SBC|NOP|   |CPX|SBC|INC|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
    0xF_ |BEQ|SBC|   |   |   |SBC|INC|   |SED|SBC|   |   |   |SBC|INC|   |
         +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

## Incoming Wiki Links

{index}